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Equipment Platform

ICP-RIE Plasma Etching Platform

High-density plasma etching for silicon, MEMS, diamond, compound semiconductors, and process development where independent plasma density and ion energy control are critical.

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This platform is configured and quoted to your process — it is not sold online.

NineScrolls ICP-RIE plasma etching platform

Wafer Size

4-12 in

ICP Power

1000-3000 W

Gas Lines

5 std.

Stage Temp

-70 to 200 C

Process-first configuration

Configure the etch process before the chamber.

ICP-RIE purchases usually start with materials, profile goals, wafer size, thermal control, gas chemistry, and allowable damage. This page keeps those engineering decisions visible before pushing a catalog choice.

Deep Silicon Etching

High-density plasma process control for MEMS, TSV, Bosch-style workflows, and profile-sensitive silicon removal.

High aspect ratioSidewall controlMEMS and TSV

Compound Semiconductor Etching

Independent source and bias control for GaN, GaAs, InP, SiC, Ga2O3, and related device research.

GaN / SiC / GaAsLow damageProfile tuning

Diamond And Hard Materials

Configurable plasma chemistry and chuck temperature options for diamond, sapphire, and hard-to-process materials.

DiamondSapphireWide bandgap

Core Process Windows

What this platform is built to control.

Compare RIE

High-density plasma

Separate ICP source control for high etch rate and chemistry flexibility.

Independent ion energy

Bias RF tuning helps control anisotropy, damage, and profile shape.

Thermal process window

Configurable chuck temperature supports low-temperature and high-temperature process work.

Technical Specifications

Homepage-level clarity, detail-page confidence.

Core values are taken from the equipment guide and presented for fast screening. Final configurations should be confirmed with engineering during quote review.

Wafer Size
4-12 in
Gas System
5 lines std.
Stage Temp
-70 to 200 C
RF Power
1000-3000 W
Bias RF
300-1000 W optional
Uniformity
< +/-5% edge exclusion
Vacuum
TMP + mechanical pump
Loading
Open-load or load-lock

Applications

Built for research teams that need process range.

MEMS fabrication

Advanced packaging

Photonics

Power electronics

Failure analysis

Materials research

Where this platform is applied

Process detail for each application area.

Process evidence

Process Results

Peer-reviewed SEM results published by research groups working on this ICP-RIE platform family — diamond, sapphire, GaAs, and silicon. Each card names the system its paper used and links to the source.

SEM image of a polycrystalline diamond film after five hours of ICP etching
Polycrystalline diamond, etched nucleation layer · ICP-S-150Lv Y. et al., Materials 19, 759 (2026), CC BY 4.0 — cropped from Fig. 3(d)
SEM image of a moth-eye antireflective microstructure array etched in sapphire
Moth-eye antireflective array in sapphire · ICP-100ALiu X.-Q. et al., PhotoniX 3, 1 (2022), CC BY 4.0 — cropped and resized from Fig. 4(g)
SEM cross-section of high-aspect-ratio slits scribed and etched into sapphire
High-aspect-ratio sapphire scribe, cross-section · ICP-100ALiu X.-Q. et al., PhotoniX 3, 1 (2022), CC BY 4.0 — cropped and resized from Fig. 3(f)
SEM image of a wave-line microstructure array fabricated in sapphire
Wave-line microstructure in sapphire · ICP-100ALiu X.-Q. et al., PhotoniX 3, 1 (2022), CC BY 4.0 — cropped and resized from Fig. 3(a)
SEM image of a 3 micrometre period grating etched in GaAs
3 µm period grating in GaAs · ICP-100AYang S. et al., Nanomaterials 10, 1313 (2020), CC BY 4.0 — cropped and resized from Fig. 2(c)
SEM image of a rectangular silicon microlens array
Rectangular silicon microlens array · ICP-100AWang B. et al., Micromachines 13, 218 (2022), CC BY 4.0 — cropped from Fig. 7(a)

Related Resources

Help engineers choose the right process path.

Resource

Learn ICP-RIE Technology

Technology guide for ICP-RIE principles

Read note

Resource

Compare ICP-RIE vs RIE

Process selection comparison

Read note

Resource

Deep Silicon Bosch Process

DRIE and deep silicon etch primer

Read note

Resource

Diamond Semiconductor Processing

Wide-bandgap diamond etch guide

Read note

FAQ

Frequently Asked Questions

What applications is the ICP-RIE platform best suited for?

The ICP-RIE platform is designed for high-aspect-ratio silicon etching, MEMS fabrication, compound semiconductor processing, diamond processing, photonics, advanced packaging, and process development where independent plasma density and ion energy control matter.

What is the difference between ICP-RIE and RIE?

ICP-RIE uses a high-density inductively coupled plasma source with separate bias control, allowing plasma density and ion energy to be tuned independently. Standard RIE is simpler and useful for many general etch workflows, but ICP-RIE provides a wider process window for demanding research applications.

What wafer sizes does the ICP-RIE platform support?

The ICP-RIE platform supports 4 inch to 12 inch wafers, with configurable loading, gas, RF, and temperature options depending on process needs.

Should I use this ICP-RIE system page or the ICP-RIE technology guide?

Use this product page when you are selecting an ICP-RIE etching system, checking wafer size, ICP power, bias control, gas lines, temperature range, applications, or quote requirements. Use the ICP-RIE Technology guide when you want to learn the principles of inductively coupled plasma generation, source power, bias power, and high-density plasma etching.

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Build an ICP-RIE process window with NineScrolls

Share your material stack, target profile, wafer size, gases, temperature needs, and lab timeline.

Start ICP-RIE QuoteTalk to Process Engineering