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Equipment Platform

ICP-RIE Plasma Etching Platform

High-density plasma etching for silicon, MEMS, diamond, and compound semiconductor research.

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NineScrolls ICP-RIE plasma etching platform
Wafer Size
4–12 in
ICP Power
1000–3000 W
Gas Lines
5 standard
Stage Temp (option)
-70 to 200 °C

Configuration dependent. Final specifications confirmed during engineering review.

Budgetary range: US$189,000–$209,000. Budgetary reference based on two recent research-platform configurations. Final pricing depends on process chemistry, pumping, chuck cooling, automation, installation, and destination taxes or duties.

This platform is configured and quoted to your process — it is not sold online.

How it works

From plasma to pattern.

Follow ion-assisted surface reactions through a representative etch sequence.

Positive ions approach an opening in a masked substrate through a schematic sheath.
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  • Ions
  • Reactive species
  • Volatile products

Representative configuration with RF bias. Schematic — not to scale. Chemistry and results depend on the recipe.

Process-first configuration

Configure the etch process before the chamber.

ICP-RIE purchases usually start with materials, profile goals, wafer size, thermal control, gas chemistry, and allowable damage. These process requirements guide the final platform configuration.

Deep Silicon Etching

High-density plasma process control for MEMS, TSV, Bosch-style workflows, and profile-sensitive silicon removal.

High aspect ratioSidewall controlMEMS and TSV

Compound Semiconductor Etching

Independent source and bias control for GaN, GaAs, InP, SiC, Ga2O3, and related device research.

GaN / SiC / GaAsLow damageProfile tuning

Diamond And Hard Materials

Configurable plasma chemistry and chuck temperature options for diamond, sapphire, and hard-to-process materials.

DiamondSapphireWide bandgap

Core Process Windows

What this platform is built to control.

Compare RIE

Independent source and bias control

Separate RF generators let you tune plasma density and ion bombardment more independently, giving you more control over etch rate, selectivity, profile, and substrate damage.

Wafer temperature control

Helium backside cooling improves heat transfer between the wafer and the temperature-controlled electrode, which helps hold wafer temperature steady during the etch. An optional -70 to 200 °C stage extends the range for low- and high-temperature chemistries.

Chamber setup per chemistry

A chamber liner and a configurable plasma discharge gap let the chamber be set up for the chemistry and materials it will run.

Technical Specifications

Key specifications for process planning and system selection.

Review core platform capabilities for initial system selection. Final configurations are confirmed with our engineering team during quote review.

Wafer Size
4-12 in
Gas System
5 lines std. + He backside cooling
Stage Temp
-70 to 200 °C, optional
RF Power
1000-3000 W
Bias RF
300-1000 W optional
Uniformity
< +/-5% edge exclusion
Vacuum
TMP + mechanical pump
Loading
Open-load or load-lock

Applications

Built for research teams that need process range.

Silicon MEMS and TSV: deep, profile-controlled etching

Wide-bandgap power and RF: GaN, SiC, Ga₂O₃

III-V photonics: GaAs and InP

Diamond films: nucleation-layer removal

Optical microstructures: sapphire antireflection arrays, silicon microlenses

2D materials and refractory metals: MoS₂, BN, graphene, W, Ta, Mo

Failure analysis: SiO₂, SiNx and silicon layer removal

Research evidence

Peer-reviewed research

Published work using the ICP etching platform we represent · 20 papers

  • Sub-10-nm Lithography for Sn4-Oxo Clusters: Effect of Molecular Polarity on Sensitivity and Resolution

    Advanced Functional Materials 2025

    View source
  • Enhanced Lithography Performance with Imino/Imido Benzenesulfonate Photoacid Generator-Bound Polymer Resists

    Small 2025

    View source
  • Femtosecond laser fabrication of SiC microlens arrays as integrated light homogenizer and splitter

    IEEE Photonics Technology Letters 2023

    View source
  • Biomimetic sapphire windows enabled by inside-out femtosecond laser deep-scribing

    PhotoniX 2022

    View source
  • Single Cubic Metalens for Compact 3D Microscopic Imaging with Extended Depth of Field

    ACS Photonics 2026

    View source
  • Broadband Complex Amplitude-Modulated Metasurfaces for Nanoprinting and Vectorial Hologram with Continuously Varying Linear Polarization Distributions

    Advanced Optical Materials 2024

    View source
  • High-Performance Color Printing and Information Encryption Enabled by Silicon Carbide Metasurface

    Advanced Functional Materials 2026

    View source
  • Periodic Microstructures Fabricated by Laser Interference with Subsequent Etching

    Nanomaterials 2020

    View source
  • Non-invasive and fully two-dimensional quantitative visualization of transparent flow fields enabled by photonic spin

    Light: Science & Applications 2025

    View source
  • Diffraction-Free Omnidirectional Antireflection Binary Metasurface via Femtosecond Laser Hybrid Etching

    Advanced Materials 2026

    View source
  • Mitigating the Thermal Bottleneck in Polycrystalline Diamond Films by Gradient ICP Etching of the Nucleation Layer

    Materials 2026

    View source
  • Experimental study of inductively coupled plasma etching of patterned single crystal diamonds

    Scientific Reports 2025

    View source
  • Integration of multifocal microlens array on silicon microcantilever via femtosecond-laser-assisted etching technology

    Micromachines 2022

    View source
  • Selenization Mechanism of Nearly 4 in. Single-Oriented PtSe2 and PtSe2/n-Si/n+-Si 2D-3D PIN Wide-Spectrum Polarization Detectors

    ACS Applied Materials & Interfaces 2025

    View source
  • Neural-Optic Co-Designed Polarization-Multiplexed Metalens for Compact Computational Spectral Imaging

    Laser & Photonics Reviews 2024

    View source
  • Sapphire concave microlens arrays for high-fluence pulsed laser homogenization

    IEEE Photonics Technology Letters 2019

    View source
  • Broadband and high-speed micro-scale PtSe2/Si 2D-3D PIN photodetector for on-chip polarization-encoded communication and imaging

    Applied Surface Science 2026

    View source
  • Rapid engraving of artificial compound eyes from curved sapphire substrate

    Advanced Functional Materials 2019

    View source
  • Silicon three-dimensional structures fabricated by femtosecond laser modification with dry etching

    Applied Optics 2017

    View source
  • Wear-resistant blazed gratings fabricated by etching-assisted femtosecond laser lithography

    Journal of Lightwave Technology 2021

    View source

Process evidence

Process Results

Peer-reviewed results published by research groups working on this ICP-RIE platform family — diamond, sapphire, GaAs, and silicon. Each card names the system its paper used and links to the source.

SEM image of a polycrystalline diamond film after five hours of ICP etching
Polycrystalline diamond, etched nucleation layer · ICP-S-150Lv Y. et al., Materials 19, 759 (2026), CC BY 4.0 — cropped from Fig. 3(d)
SEM image of a moth-eye antireflective microstructure array etched in sapphire
Moth-eye antireflective array in sapphire · ICP-100ALiu X.-Q. et al., PhotoniX 3, 1 (2022), CC BY 4.0 — cropped and resized from Fig. 4(g)
Confocal images, 3D topography, and cross-section profiles of a laser-patterned GaAs grating before (left) and after (right) ICP etching, with less surface debris after etching
Laser-patterned GaAs grating, before and after ICP etching · ICP-100AYang S. et al., Nanomaterials 10, 1313 (2020), CC BY 4.0 — cropped to panels (a), (b), (d) and (e) of Fig. 5
SEM image of a rectangular silicon microlens array
Rectangular silicon microlens array · ICP-100AWang B. et al., Micromachines 13, 218 (2022), CC BY 4.0 — cropped from Fig. 7(a)

System Views

System Views

Actual system photos: the chamber with the lid raised, the etch module exterior with the RF unit on top, and the module rear with its power, interface, and RF-in connections. Use them to review the source geometry and service access before configuration review.

ICP-RIE chamber with the lid raised, showing the planar ICP coil above the dielectric window and the wafer stage below
Chamber open: ICP coil and wafer stage
ICP-RIE etch module exterior with the RF unit mounted on top, vented side panels, a port flange, and the lid gas strut
Etch module exterior with RF unit
Rear of the ICP-RIE etch module showing the RF unit power, interface, and RF-in connections above twin cooling fans
Module rear: power, interface, RF-in

System overview · 2 minutes

Inside the ICP-RIE platform.

See how independent ICP source and RF bias control shape the etch, follow the gas, vacuum and thermal paths through the system, and explore the chamber architecture and optional load-lock.

Request an ICP-RIE quote

Representative configuration; options vary. Process results, transfer mechanics and selected internal views are illustrative. Software screens show example values. The load-lock is optional.

Service & Support

Supported from factory acceptance through operation

Every ICP-RIE system is factory-acceptance tested before shipment, with the acceptance and as-shipped configuration documented. NineScrolls supports the system through commissioning and operation, for both equipment issues and process questions.

Service terms and support options

Delivered with every system

  • Factory acceptance checklist and signed record
  • As-shipped configuration record
  • Facility requirements and installed-utilities record
  • Warranty and service contacts
  • Machine-specific NineScrolls Academy materials

Standard coverage

  • 2-year limited warranty
  • Replacement parts and remote technical support
  • Software updates for 3 years
  1. Factory acceptance

    Before shipment, the system is tested for vacuum, RF, gas control and etch performance on standard silicon test wafers, using an agreed FAT protocol or the NineScrolls standard FAT procedure. Customer-specific materials and process results are outside the standard FAT scope.

  2. Installation and commissioning

    Remote commissioning guidance is included. On-site installation, commissioning and initial process verification can be quoted with the system, using verification conditions agreed in advance.

  3. Training

    Operator training can be quoted with the system. Every supported system also receives machine-specific documentation and training materials through NineScrolls Academy.

  4. Ongoing support

    Diagnosis starts remotely, from alarm records, recipe data and photos. On-site service can be arranged when needed; labor and travel are quoted unless covered by a service agreement.

    Equipment
    Vacuum, RF, gas delivery, interlocks and controls.
    Process
    Etch rate, uniformity, profile and repeatability. We help work out whether the recipe, chamber condition, hardware or facility needs to change. Recipe development for new materials or structures is scoped separately.
  5. Parts and uptime

    Warranty replacement parts are supplied by NineScrolls. A recommended spare-parts package can be quoted based on the system configuration and support needs, and we can identify customer-held spares for critical components where warranted.

FAQ

Frequently Asked Questions

What applications is the ICP-RIE platform best suited for?

The ICP-RIE platform is designed for high-aspect-ratio silicon etching, MEMS fabrication, compound semiconductor processing, diamond processing, photonics, advanced packaging, and process development where independent plasma density and ion energy control matter.

What is the difference between ICP-RIE and RIE?

ICP-RIE uses a high-density inductively coupled plasma source with separate bias control, allowing plasma density and ion energy to be tuned independently. Standard RIE is simpler and useful for many general etch workflows, but ICP-RIE provides a wider process window for demanding research applications.

What wafer sizes does the ICP-RIE platform support?

The ICP-RIE platform supports 4 inch to 12 inch wafers, with configurable loading, gas, RF, and temperature options depending on process needs.

Should I use this ICP-RIE system page or the ICP-RIE technology guide?

Use this product page when you are selecting an ICP-RIE etching system, checking wafer size, ICP power, bias control, gas lines, temperature range, applications, or quote requirements. Use the ICP-RIE Technology guide when you want to learn the principles of inductively coupled plasma generation, source power, bias power, and high-density plasma etching.

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Build an ICP-RIE process window with NineScrolls

Share your material stack, target profile, wafer size, gases, temperature needs, and lab timeline.