Metal Etching: Complete Guide

By NineScrolls Engineering · 2026-04-28 · 28 min read · Process Integration

Chemistries, equipment, and process integration for aluminum, refractory, noble, and magnetic metal stacks.

Target Readers: Process and integration engineers responsible for metal patterning in CMOS back-end-of-line, MEMS, MRAM, photonics, plasmonics, and power-device flows; cleanroom managers selecting between RIE/ICP, IBE/RIBE, and wet benches for a new metal stack; researchers benchmarking sidewall quality, redeposition, and post-etch corrosion. Newcomers will benefit from the metal-by-metal chemistry table and the three-route decision tree; experienced engineers can skip to the redeposition-control, corrosion-mitigation, and endpoint-detection sections.

1) Why Metal Etching Is Hard

Silicon and silicon-dioxide etching look easy in retrospect. SiF₄ boils at −86 °C and pumps away the moment it forms. SiCl₄ boils at 58 °C and only needs a warm wall to leave the chamber. The plasma chemist's life is straightforward: pick a halogen-bearing feed gas, let the radicals find the surface, and the volatile product carries the silicon away.

Metals are not so cooperative. The relevant halides have boiling points that are tens to hundreds of degrees above any practical wafer temperature, and several of them are stable solids that simply pile up on the substrate. Until the etch product can leave the surface as a gas, the etch does not progress — physical sputtering is the only fallback.

1.1 The Volatility Problem in One Table

The pattern is clear: aluminum, titanium, tungsten, molybdenum, and a small handful of refractory metals can be etched chemically because their halides volatilize at reachable temperatures. Copper, gold, platinum, nickel, cobalt, and the ferromagnetic alloys cannot — their halides are condensed phases at any temperature you would ever expose a device wafer to. For these metals, etching means physical removal: ion beam milling (IBE/RIBE) when you need anisotropy, or wet etching when sidewall profile is not critical.

Figure 1: Metal etching decision tree. The first branch is always volatility — if the most accessible metal halide is a gas at reasonable wafer temperatures, a plasma route is open. If not, the choice collapses to ion beam milling or a wet bath.

1.2 Five Things That Make Metal Etching Different

Every metal-etch process engineer learns to think about five things that you can mostly ignore in a Si or oxide flow:

• Redeposition. Sputtered metal atoms are heavy, sticky, and chemically reactive. They redeposit on sidewalls, on the chamber walls, and especially on the photoresist edge, where they can mask the etch and create “fences” that survive the strip. Tilted IBE and chamber-wall conditioning are the two main mitigation tools.
• Post-etch corrosion. Aluminum chloride residues are hygroscopic; the moment the wafer leaves vacuum, AlCl₃ + H₂O reactions liberate HCl that attacks the bulk Al. Production aluminum etchers have a passivation step (CHF₃ or H₂O vapor) and a queue-time limit before O₂ ash and DI rinse.
• Selectivity to photoresist. Chlorine plasmas erode resist at 100–300 nm/min, comparable to or faster than the metal etch rate. Hard masks (oxide, nitride, or sacrificial metal) are common in deep metal etches; for thin Al gates, the resist budget is tight but workable with a thick (1.5–2 µm) i-line resist.
• Endpoint detection. The thin films involved (often 30–500 nm) etch in seconds to a few minutes, and over-etch into the underlying barrier layer (TiN, Ta, Ti) is a common failure mode. Optical emission monitoring of AlCl, TiCl, or W lines is essential.
• Magnetics, ferroelectrics, and noble metals. Stacks containing CoFeB, NiFe, Pt, Ru, or PZT cannot be exposed to high-temperature halogen plasmas without permanent property loss. IBE at low ion energy and tilted angle is usually the only route that preserves device performance.

2) The Three Process Routes

Every metal etch process in production today belongs to one of three families. The boundaries are real, not academic — choosing the wrong route can cost a year of process development.

2.1 Chemical Plasma (RIE / ICP-RIE)

Chemical plasma etching is the workhorse route for aluminum, titanium, tungsten, molybdenum, and most thin-film refractory metals. A halogen-bearing feed gas is dissociated to produce reactive radicals; the radicals react with the metal surface to form a volatile metal halide; ion bombardment provides directionality and clears the reaction product from the surface. Typical equipment: capacitively coupled RIE for thin films (<200 nm Al/Ti gates), inductively coupled ICP-RIE for thicker films, deeper etches, or where independent control of plasma density and ion energy is needed (interconnects, MEMS metal posts).

The strengths of chemical plasma etching are speed (etch rates of 0.5–5 µm/min are routine), high selectivity to oxide and nitride underlayers (5:1 to >100:1 with proper chemistry), and excellent profile control via ion bias and polymer-forming additives. The weaknesses are limited material coverage (only the volatile-halide metals), aggressive resist erosion, and the corrosion problem already noted for aluminum.

2.2 Physical / Ion Beam (IBE / RIBE)

Ion beam etching uses a broad-area, gridded ion source to direct a collimated beam of inert (Ar) or reactive (Ar + Cl₂, Ar + O₂) ions at the substrate. The substrate is on a tilting, rotating stage so the ion incidence angle and azimuthal direction can be set precisely. Material is removed by physical sputtering — the ion's momentum knocks atoms out of the surface regardless of whether a volatile product exists. Reactive IBE (RIBE) adds a chemical channel: the beam contains both inert and reactive ions, giving a modest etch rate boost on materials that can react with chlorine or oxygen.

IBE/RIBE is the only practical route for copper, gold, platinum, nickel, cobalt, ruthenium, magnetic stacks (MTJ), and any film where chemical attack would degrade device properties. Etch rates are slow (typically 5–50 nm/min) and selectivity to mask is modest (1.5–3:1 for hard masks, often <1:1 to resist). The decisive advantages are universal material coverage and the ability to dial sidewall taper from vertical to 30° by tilting the stage. For a deeper treatment of source architectures and tilt-angle optimization, see the Ion Beam Etching (IBE) & RIBE Guide.

Figure 2: Three process routes side-by-side. RIE delivers vertical, fast etches but only for volatile-halide metals. IBE delivers a vertical-to-tilted profile on any metal but is slow and subject to redeposition. Wet etch is fast and damage-free but isotropic, restricting it to features wider than ~3× the film thickness.

2.3 Wet Etching

Wet etching survives in three production niches: chromium photomask blanks (ceric ammonium nitrate), residual TiW or seed-layer Cu strip in damascene flows (peroxide-based mixtures), and any large-feature metal patterning where isotropy is acceptable (legacy MEMS, thick-film resistors, RF inductors). Wet rates can exceed 1 µm/min, equipment cost is low, and there is no plasma-induced damage. The undercut, however, is geometric — for a 200 nm film, expect ~200 nm of lateral etch under the resist, which sets a hard floor on minimum line width.

3) Metal-by-Metal Process Cookbook

The remainder of this section walks through the process recipes you will actually encounter. Each entry is structured: chemistry, equipment, typical recipe window, mask choice, and the things that bite you.

3.1 Aluminum (Al, Al-Si, Al-Cu, Al-Si-Cu)

Chemistry: Cl₂ + BCl₃, with optional N₂, CHF₃, or CH₄ for sidewall passivation. BCl₃ is the dominant native-oxide breakthrough agent — without it, the AlO_x surface layer prevents etch initiation. N₂ creates a thin AlN/BN sidewall passivation that improves anisotropy.

Equipment: ICP-RIE strongly preferred; CCP RIE acceptable for <500 nm films and relaxed CD. Wafer temperature 50–80 °C to keep AlCl₃ volatile but below the resist softening point. Chamber wall conditioning (seasoning) is critical — bare aluminum walls trap chlorine, making each first wafer different from the last.

Typical recipe (1.0 µm Al-Cu interconnect, ICP-RIE):

• Native-oxide breakthrough: BCl₃ 50 sccm, 5 mTorr, ICP 600 W, bias 50 W, 15 s
• Main etch: Cl₂ 60 sccm + BCl₃ 20 sccm + N₂ 10 sccm, 8 mTorr, ICP 800 W, bias 80 W, ~120 s with OES endpoint on AlCl 261 nm
• Over-etch: same gases, bias dropped to 40 W, 20% over the endpoint time
• In-situ passivation: CHF₃ 50 sccm or H₂O vapor, 30–60 s, no bias — converts surface AlCl₃ to AlF₃ or Al(OH)_x, which does not hydrolyze in air
• Out-of-vacuum within 60 s, immediate O₂ ash to strip resist + remaining Cl, then DI rinse

Mask choice: 1.5–2.0 µm i-line resist for <1 µm Al. SiO₂ hard mask (200–500 nm) for >1 µm or where critical dimension control is tight. Selectivity to resist: 2–3:1; to oxide: 15–30:1. See the Hard Mask Processing guide for full mask material selection and integration trade-offs.

What bites you: Skipping the passivation step is the most expensive mistake in aluminum etching. Wafers that look fine at the metrology station develop pitting, “black silicon” haze, or open lines after 12–48 hours in fab humidity. Set a queue time of <30 minutes from etch out to ash, and validate every chamber recovery with a moisture-exposure soak. For systematic residue characterization and removal procedures, see Post-Etch Cleaning & Residue Removal.

3.2 Titanium and Titanium Nitride (Ti, TiN)

Chemistry: Cl₂/Ar (Ti); Cl₂/Ar or SF₆/Ar (TiN). The TiN etch in fluorine is highly selective to Si and SiO₂ and is a common production choice for gate-stack patterning where the Ti/TiN layer sits on a high-k dielectric.

Equipment: ICP-RIE for >50 nm films; CCP RIE for thin barrier-layer strips. Ti/TiN is often the second step in a stack etch (resist → SiO₂ hard mask → TiN → gate metal → high-k), where the TiN step is short (<15 s) and high-selectivity to the underlying high-k. The high-k layer itself (typically ALD-deposited HfO₂ or Al₂O₃) is usually preserved as the gate dielectric.

Typical recipe (50 nm TiN, ICP-RIE):

• Cl₂ 30 sccm + Ar 20 sccm, 5 mTorr, ICP 500 W, bias 30 W, 25 s
• Endpoint by OES on TiCl 365 nm, 50% over-etch
• Selectivity to HfO₂: ~30:1 in chlorine, >100:1 in SF₆

3.3 Tungsten (W) and Molybdenum (Mo)

Chemistry: SF₆ dominates — WF₆ boils at 17 °C, MoF₆ at 34 °C, both well below any reasonable wafer temperature. NF₃ is a cleaner alternative that produces less chamber polymer. Cl₂/O₂ is a valid alternative chemistry for Mo and is preferred for Mo electrodes in display applications because chamber recovery is easier.

Equipment: ICP-RIE for via plug etchback or pattern etch; CCP RIE for blanket etchback. W is famous for its uniformity sensitivity — loading effect can produce 20–30% center-to-edge non-uniformity unless the chamber pressure and ICP power are tuned for the specific pattern density.

Typical recipe (300 nm W, ICP-RIE):

• SF₆ 40 sccm + O₂ 5 sccm + Ar 20 sccm, 8 mTorr, ICP 700 W, bias 40 W
• Etch rate ~500 nm/min, selectivity to SiO₂ 20:1, to resist 1.5:1
• Endpoint on WF 248 nm or interferometry

3.4 Copper (Cu)

Chemistry: there is no production plasma chemistry for copper. CuCl_x melts above 400 °C. Two routes survive in the fab:

• Damascene CMP. The mainstream BEOL approach: pattern the dielectric, deposit Cu by ECP, polish back with CMP. No plasma etch involved. This is how every advanced-logic wafer is made today.
• IBE/RIBE. For non-damascene applications — subtractive Cu interconnects in some packaging flows, Cu inductors and antennas, photonic Cu plasmonic structures. Ar IBE at 300–500 V, 30–60° tilt to manage redeposition.

Subtractive Cu plasma etching has been an active research topic for thirty years — processes based on hot HCl, hexafluoroacetylacetonate (hfac), or H₂/CH₄ at >200 °C have all been demonstrated. None has reached production. If your application demands subtractive Cu patterning at <5 µm line width, plan on IBE.

3.5 Gold, Platinum, and Other Noble Metals

Chemistry: none practical. Au, Pt, Pd, Ag have no halide volatile below 250 °C. The production route is IBE (Ar) for thin films <500 nm, with optional Cl₂ or O₂ assist for a 30–50% rate boost on Pt. For thicker Au (>1 µm, common in MEMS contacts and RF inductors), wet etching with KI/I₂ is fast (>500 nm/min) and clean but isotropic.

IBE recipe (200 nm Au, normal-incidence): Ar 8 sccm, 500 V beam, 100 mA, 30 nm/min, selectivity to photoresist 1:1, selectivity to SiO₂ 0.7:1. For better selectivity, use a Cr or Ti hard mask. For tilted IBE on MTJ stacks, see Section 3.6.

3.6 Magnetic Stacks (CoFeB, NiFe, MTJ)

Magnetic random-access memory (MRAM) device fabrication is the most demanding application of metal etching in the modern fab. A magnetic tunnel junction (MTJ) stack contains 10–20 layers, each 0.5–3 nm thick, including CoFeB free and reference layers, MgO tunnel barrier, Ru and Ta spacers, and a synthetic antiferromagnet. None of these materials has a volatile chloride at usable temperatures.

The production answer is tilted IBE with a metal hard mask. The wafer sits on a stage that rotates while tilted at 30–70° from normal. The tilted beam clears redeposited material from the sidewall before it can short the tunnel barrier; the rotation ensures azimuthal uniformity. Beam voltage is kept low (<500 V) to avoid amorphizing the MgO. A second “trim” etch at higher tilt is sometimes used to remove residual sidewall damage.

Typical MTJ etch sequence (300-mm production):

• Hard mask open: TaN or Ta hard mask patterned by chlorine RIE, resist stripped before MTJ etch
• Main IBE: Ar, 400–600 V, 30° tilt with rotation, etch to ~1 nm into the bottom electrode
• Trim IBE: Ar, 200–300 V, 60–70° tilt, 5–10 s to remove sidewall redep
• In-situ encapsulation: SiN PECVD without breaking vacuum, to lock the magnetic state

3.7 Chromium (Cr)

Cr etching has two faces. For photomask production (binary chrome on quartz), the standard remains wet etching with cerium-ammonium-nitrate-based formulations — isotropic but acceptable for the typical 100–500 nm line widths and 80 nm Cr thickness. For chrome hard masks under deep silicon etches, Cl₂/O₂ RIE is well-established: the chrome opens cleanly in oxidizing chlorine and the etch is highly selective to the underlying oxide.

Cl₂/O₂ RIE recipe (50 nm Cr hard mask, ICP): Cl₂ 20 sccm + O₂ 10 sccm, 5 mTorr, ICP 400 W, bias 30 W, ~30 s, endpoint OES on CrO₂Cl₂ 360 nm.

3.8 Refractory Metals (Ta, Hf, Zr, Nb)

These metals all have chlorides and fluorides that volatilize above 200 °C. For thin films (<100 nm) they are typically etched by IBE with mild chemical assist (Cl₂ or BCl₃ in the beam). For thicker films, hot-chuck ICP-RIE with Cl₂/BCl₃ is feasible but rare outside specialty applications. TaN as a barrier or hard mask is a common configuration; Cl₂/Ar etch at high ICP power and modest bias is standard.

4) Sidewall Profile, Redeposition, and Damage Control

Three problems dominate metal-etch yield: sidewall taper drift, redeposition fences, and plasma-induced damage to the underlying device or to magnetic/ferroelectric properties. Each has a recognized engineering response.

4.1 Sidewall Profile

For chemical plasma etching, sidewall taper is set by the balance of ion-driven vertical etch and isotropic radical etch. The ion energy floor (typically 50–100 V for chlorine etches) sets the minimum directional component; reducing ion energy below that floor lets radicals etch laterally and creates a tapered or even concave profile. Polymer-forming additives (N₂, CHF₃, CH₄) deposit a thin sidewall film that blocks lateral etch — this is how aluminum lines stay vertical despite heavy chlorine radical flux.

For IBE, sidewall taper is geometrically set by the ion incidence angle. Normal incidence gives the steepest profile (typically 75–85° sidewall) but maximum redeposition. Tilted IBE at 30–45° trades a steeper sidewall for major reduction in redeposition. For MTJ devices, the sweet spot is usually ~30° tilt with continuous rotation.

4.2 Redeposition

Sputtered metal atoms with no volatile escape route stick wherever they land. The visible failure modes are:

• Sidewall fences: a thin, vertical “fin” of redeposited metal standing where the resist edge used to be, surviving the resist strip and shorting adjacent lines. Most common in normal-incidence IBE on Au, Pt, Cu.
• Trench filling: redep accumulating in narrow trenches faster than it can be removed, capping the etch. Common in deep IBE on patterned Cu pillars.
• Chamber drift: metal coating on chamber walls slowly changes the plasma chemistry and the wall conductivity, producing a process drift over the maintenance interval.

The mitigations are: tilted IBE with rotation (the workhorse), chemical-assist beams (Cl₂, O₂) to gasify part of the redep, frequent in-situ chamber cleans (O₂ for noble-metal stations, Cl₂/BCl₃ for Al stations), and sacrificial conditioning wafers between batches.

4.3 Plasma-Induced Damage

Damage takes three forms in metal etching:

• Subsurface lattice damage from high-energy ions, which degrades sheet resistance and can introduce defect-mediated leakage in adjacent dielectrics.
• Charging damage when isolated metal pads accumulate plasma charge, driving high voltage across thin gate dielectrics or tunnel barriers.
• Magnetic and ferroelectric property loss when high temperatures or aggressive chemistries reach functional layers (CoFeB, PZT, BaTiO₃).

Low-bias ICP and IBE at <500 V are the primary damage controls. Pulsed plasma (synchronous source/bias pulsing) reduces both charging and ion-energy spread. For magnetic stacks, the entire process is designed around a thermal budget that keeps the wafer below ~150 °C throughout.

5) Endpoint Detection and Process Control

Metal films are thin and the cost of over-etching into the underlying barrier or device layer is high. Endpoint detection earns its keep on every metal etcher.

5.1 Optical Emission Spectroscopy (OES)

The plasma is rich in atomic and molecular emissions from the etch products. As the metal layer clears, the corresponding line drops; as the underlayer is exposed, new lines appear. Standard endpoint wavelengths:

5.2 Interferometry

For blanket etchback or for transparent stacks (e.g., metal on quartz photomask), laser interferometry on the etching surface gives a direct thickness reading. The technique works only on patterns with significant transparent area or on monitor wafers; on dense metal patterns OES is more reliable.

5.3 Time-Based with Periodic Calibration

For very short etches (<15 s, e.g., 10-nm TiN gate caps), endpoint signal is inadequate and the etch is run open-loop on calibrated time. The discipline required is regular monitor-wafer measurement and tight control of upstream variables (gas flow calibration, pressure transducer drift, ICP coupling efficiency).

6) Equipment Selection — Practical Decision Tree

Most labs do not have the budget to install a dedicated tool for every metal. The goal is to map the metal portfolio onto the smallest set of platforms that delivers the required quality.

Figure 3: Equipment-to-metal suitability matrix. Most production labs converge on a chlorine ICP-RIE for Al/Ti/Cr, a fluorine ICP-RIE for W/Mo, and an IBE/RIBE for everything else. A wet bench survives for chrome photomask and Cu seed strip.

6.1 Chlorine ICP-RIE

The single most useful metal etcher in a research or pilot fab. Cl₂, BCl₃, and Ar as base gases, plus N₂ and O₂ as additives, cover Al, Ti, TiN, Cr, Ta, Mo (with O₂), and most refractory metals. Required features: hot chuck (50–100 °C), endpoint OES, in-situ passivation step, robust load-lock to limit air exposure of etched aluminum.

6.2 Fluorine ICP-RIE (or shared chamber with SF₆)

For W, Mo, and any fluorine-active material (TiN, MoSi₂, polysilicon). A dedicated fluorine chamber avoids the cross-contamination problems of running fluorine and chlorine sequentially in the same chamber. Many labs share a single ICP-RIE between chemistries with a defined cleaning protocol; for high-volume production, dedicated chambers are the rule.

6.3 IBE / RIBE

The universal solvent of metal etching. Required for Au, Pt, Cu (subtractive), Ni, Co, magnetic stacks, and any film that the chemical routes cannot touch. Required features: tilting/rotating chuck (0–70° tilt, continuous rotation), reactive gas option (Cl₂, O₂) for selectivity boost, secondary electron neutralizer to prevent charging on isolated structures.

6.4 Wet Bench

For Cr photomask, Cu seed-layer strip, large-feature Au, and any application where isotropy is acceptable. A separate “dirty” bench is mandatory — no metal-bath line should share filtration with a CMOS wet station.

7) Application-Specific Process Maps

7.1 CMOS Back-End Interconnect

Modern interconnect is dual-damascene Cu — no metal etch involved at the line/via level. Aluminum subtractive etch survives only at the topmost passivation/bond-pad layers (4–6 µm thick). Process: thick i-line resist or oxide hard mask, ICP-RIE with Cl₂/BCl₃/N₂, mandatory in-situ passivation, and immediate ash + DI rinse.

7.2 MEMS Electrodes and Through-Silicon Pads

MEMS metal etching is dominated by Au (RF MEMS, capacitive sensing), Cr (photolithography masks for downstream Si etch), and thick Al (capacitive comb drives). The thick-film, large-feature regime favors wet etch where possible and IBE for the rest. For Au >500 nm with sub-micron critical dimension, IBE is the only practical answer.

7.3 MRAM and Spintronics

Tilted IBE with metal hard mask. Process control variables are beam voltage (low to preserve MgO barrier), tilt angle (30° main, 60° trim), and rotation speed (must complete an integer number of revolutions per layer to avoid asymmetry). In-situ encapsulation immediately after etch is non-negotiable.

7.4 Photonics and Plasmonics

Plasmonic structures pattern Au, Ag, and Cu at 50–200 nm critical dimension, often with sub-100 nm thickness. The dominant routes are lift-off (most common for <500 nm structures) and IBE at normal incidence with a Cr or Ti hard mask. Sidewall roughness directly affects optical performance, so tilt is kept low and beam energy is reduced to minimize scattering centers.

7.5 Power Devices and Wide-Bandgap Stacks

GaN HEMT and SiC MOSFET ohmic contacts (typically Ti/Al/Ni/Au or Ti/Al/Mo/Au) are patterned by lift-off, not subtractive etch. Source-field plates and gate metal can be subtractive; ICP-RIE with Cl₂/BCl₃ for the Al/Ti layers, with an etch stop on the underlying Ni or Au handled by a strict time-based recipe. For full device-flow context, see the GaN/SiC Wide-Bandgap Fabrication Guide.

8) Troubleshooting Reference

9) Process Development Checklist

For a new metal-etch process or a transfer between tools, work through the following before committing to production:

• Chemistry selection: Confirmed volatile halide route exists, or default to IBE? Document the volatility data behind the choice.
• Mask selection: Resist budget calculated against measured etch selectivity? Hard mask required? Hard mask removal route compatible with the device?
• Wafer temperature: Hot enough for halide volatilization, cool enough for resist integrity?
• Endpoint: OES wavelength validated on a real device wafer? Endpoint algorithm tested on under-loaded and over-loaded patterns?
• Passivation: For Al, is in-situ passivation step measured (residual Cl by XPS or AES)?
• Queue time: Documented from etch out to ash to wet rinse? Verified under fab humidity range?
• Chamber conditioning: First-wafer effect quantified? Number of seasoning wafers before production? Defined wet-clean trigger?
• Damage: Sheet resistance, contact resistance, and (for magnetic stacks) magnetic property measured before and after etch?
• Profile: Cross-section SEM at center, mid, and edge? Sidewall taper within spec? No fences, no undercut?
• Run-to-run drift: 25-wafer continuous run completed? CD and rate drift <5%?

10) Equipment Notes from the NineScrolls Catalogue

NineScrolls supplies the etch platforms most commonly deployed against the metal-etch problem set described above:

• ICP Etcher Series — chlorine and fluorine ICP-RIE for Al, Ti, TiN, W, Mo, Cr, and refractory metal patterning. Hot chuck, OES endpoint, in-situ passivation step, and Cl₂-rated load-lock are configurable for each metal-etch application.
• RIE Etcher Series — capacitively-coupled RIE for thin-film metal patterning where independent plasma-density control is not required. Suited to TiN gate caps, <200 nm Al gates, and Cr hard mask opening.
• IBE / RIBE Systems — the universal route for Au, Pt, Cu (subtractive), Ni, Co, magnetic stacks, and noble-metal plasmonics. Tilt range 0–70° with continuous rotation, optional reactive gas (Cl₂, O₂) for selectivity assist, and secondary neutralizer for charge-sensitive devices.
• Striper Systems — in-line O₂ ash for resist removal and residual-chlorine elimination immediately after Al etch.
• Sputter Systems — the deposition counterpart for the metal layers being etched, useful when a barrier or hard-mask metal is part of the same flow.
• MEB-600 E-Beam Evaporator — high-purity noble metal deposition (Au, Pt, Cr, Ti) for lift-off patterning and as the deposition front-end for IBE-defined plasmonic and MTJ structures.

Customers patterning new metal stacks — especially MTJ, plasmonic Au/Ag, or thick Al for power devices — should expect a 4–8 week process development engagement before transferring to production. Recipes for the standard metals (Al, Ti, TiN, W, Cr) are pre-qualified and transfer in 1–2 weeks.

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