GlobalFoundries Breaks Ground on €1.1 Billion Dresden Expansion: 22nm FD-SOI, Embedded Memory, and BCD Drive Equipment Ramp Through 2028

By NineScrolls Team · 2026-04-17 · 7 min read · Industry

Why Dresden? Europe's Strategic Anchor Fab

GlobalFoundries' Fab 1 in Dresden is already the largest semiconductor manufacturing site in Europe, running 300mm wafers across a range of specialty nodes from 22nm to 130nm. With AI, vehicle electrification, and defense electronics driving European chip demand to new highs, the U.S.-headquartered foundry is doubling down. In March 2026, GlobalFoundries broke ground on Project SPRINT — a €1.1 billion ($1.27 billion USD) expansion that will push Fab 1 past the one-million-wafer-per-year threshold by end of 2028, making it the first European fab to reach that milestone.

The expansion targets GlobalFoundries' core differentiated technologies: 22nm fully depleted silicon-on-insulator (FD-SOI), embedded non-volatile memory (eNVM), bipolar-CMOS-DMOS (BCD) power processes, and RF wireless platforms. These are not commodity CMOS nodes. They are process-intensive, equipment-heavy technologies where plasma etch precision and thin-film deposition control determine device performance, reliability, and automotive-grade qualification outcomes.

Project SPRINT: The Numbers That Matter

Project SPRINT adds more than 110,000 wafers per year of 300mm capacity to Fab 1, expanding total annual output to over one million wafers by end of 2028. Cleanroom space grows approximately 10% — from roughly 59,000 to 65,000 square meters. Exyte, a global cleanroom engineering and construction specialist, serves as the primary project partner. The first new production tools are scheduled for installation in the second half of 2026, with full ramp and integration into ongoing operations targeted by end of 2028.

GlobalFoundries CEO Tim Breen framed the investment as strengthening "our ability to serve European and global customers with secure, energy-efficient semiconductor technologies." The automotive and industrial sectors — primary end markets for Fab 1 — operate on decades-long supply commitments and qualify-once/supply-forever procurement cycles, meaning the equipment installed in H2 2026 will be running automotive-grade wafers well into the 2030s. Project SPRINT is not a cyclical bet. It is infrastructure.

22nm FD-SOI, BCD, and Embedded NVM: The Process Stack

The three primary process families being expanded in Project SPRINT each carry a distinct and demanding equipment signature. 22nm FD-SOI is GlobalFoundries' flagship low-power and RF platform. The active silicon film above the buried oxide (BOX) is less than 7nm thick, requiring atomic-precision plasma etch for gate patterning, sidewall spacer control, and shallow trench isolation (STI). Any etch non-uniformity that punches through to the BOX layer ruins the device. Gate dielectrics use HfO₂ or HfSiON deposited by ALD, with TiN metal gate formed by ALD or PVD — both critical films where angstrom-level thickness control is not optional.

Embedded NVM — specifically the charge-trap flash variants used in automotive-grade secure microcontrollers and smart cards — demands repeated oxide-nitride-oxide (ONO) dielectric stacks, each layer deposited by PECVD or thermal CVD to tight thickness and interface quality specifications. The tunnel oxide, blocking oxide, and charge-trap nitride layers must each hit exact targets; process drift of a few ångströms shifts the memory window and causes retention failures at automotive temperature cycles. BCD power processes add a third dimension: deep trench isolation requiring high aspect ratio silicon ICP etch, thick field oxide PECVD runs of 1–3 µm, and metal silicide formation (NiPt, CoSi₂) for low-resistance contacts to high-voltage drain and source regions operating at 40–200V.

First Tool Installs H2 2026: What Goes Into the Chamber

The H2 2026 tool installation phase for Project SPRINT will prioritize bottleneck steps in the expanded process flows. For 22nm FD-SOI, front-end dielectric deposition — ALD gate oxide, PECVD spacer nitride, PECVD STI oxide — and gate/active area plasma etch are the first critical path tools. Gate etch on FD-SOI is especially demanding: the etch must stop on less than 7nm of silicon above the BOX with no overetch budget. For BCD power devices, deep trench silicon etch chambers (ICP/DRIE) and thick PECVD oxide deposition systems are installed early, since these define the device architecture and set the pitch for all downstream patterning. Back-end metallization — PVD Ti/TiN barrier, Al or Cu sputter deposition — follows once the front-end stack is electrically qualified.

A simple capacity estimate illustrates the equipment scale. Specialty nodes running 22nm FD-SOI typically require 3–5 plasma etch chambers and 2–4 PECVD reactors per 1,000 wafer-starts per month (WSPM). Project SPRINT's incremental ~9,000 WSPM implies 25–45 new etch and deposition tools required across the ramp-up period through 2028. At 300+ individual process steps per wafer for complex BCD or eNVM flows, the aggregate chamber-hours of plasma exposure across this ramp are substantial. Every one of those chamber-hours represents etch and deposition consumables: gas delivery, electrodes, liners, targets, and process monitoring systems.

European Chips Act and German Government Funding

Project SPRINT draws on multiple public funding streams. The German federal government and the State of Saxony are co-investing alongside GlobalFoundries under the European Chips Act framework, which targets doubling Europe's global share of semiconductor production to 20% by 2030. Germany has committed approximately €495 million toward GlobalFoundries' Dresden expansion, part of a broader Saxony semiconductor cluster that also includes Infineon's €5 billion fab expansion (receiving €1 billion in state aid) and ESMC — the TSMC-NXP-Bosch-Infineon joint venture also sited in Dresden. Three major fabs ramping simultaneously in one metropolitan area is a localized equipment demand event that Europe has not seen since the 1990s Dresden semiconductor buildout.

The concentration of semiconductor capital in Saxony is creating a regional equipment supply chain effect. European equipment service companies, process gas suppliers, chemical distributors, and cleanroom subcontractors are all scaling up local capacity to support simultaneous tool installations across multiple Dresden fabs. For automotive-qualified processes with strict contamination controls and rapid response service-level agreements, local service infrastructure is as strategically important as the equipment itself. This creates an opening for specialty equipment suppliers — including those covering ICP etch, PECVD, and magnetron sputtering — with responsive European field support.

NineScrolls Niche Angle

Plasma processing equipment (etch, PECVD, plasma activation): The 22nm FD-SOI, embedded NVM, and BCD process flows at the core of Project SPRINT are among the most plasma-intensive in the specialty foundry market. FD-SOI gate etch requires sub-nanometer uniformity on a 7nm silicon film. ONO stacks for charge-trap NVM demand PECVD or ALD reactor runs with tight within-wafer thickness uniformity across the full 300mm diameter. BCD deep trench etch for isolation and resurf structures requires high aspect ratio ICP silicon etch with vertical sidewall profile control and minimal microloading. These same process physics — ICP plasma etch selectivity, PECVD film uniformity, plasma-surface interaction at complex stack interfaces — govern ICP and PECVD system design in research and small-volume production environments, the segment where NineScrolls operates.

Thin film deposition systems (ALD, CVD, PVD, sputtering): ALD is essential for high-k gate dielectrics (HfO₂, Al₂O₃) and metal gate (TiN) layers in 22nm FD-SOI. PVD magnetron sputtering is the workhorse for Ti/TiN barrier layers, Al interconnect, and NiPt silicide contacts throughout BCD and high-voltage flows. PECVD runs for STI fill, inter-layer dielectric, and passivation oxide/nitride cap layers are high-throughput, consumable-intensive steps. With more than 9,000 additional WSPM of specialty process wafers ramping through 2028, aggregate deposition tool demand across ALD, PECVD, and PVD is significant — and sustained, not a single surge.

The equipment supply chain: Project SPRINT's phased ramp through 2028 creates a predictable, long-horizon equipment procurement pipeline. Automotive-qualified process flows require extended qualification periods for any new tool or recipe change, meaning equipment placed in H2 2026 anchors the supply chain for years. The Dresden cluster effect — three large fabs installing tools simultaneously — also creates regional service capacity pressure: calibration, spare parts, chamber cleaning, and replacement targets for magnetron sputtering tools all become geographically sensitive for automotive-grade fabs that cannot tolerate unplanned downtime. Specialty equipment suppliers with strong European field support are best positioned to capture this demand.